This invention relates to wideband code division multiple access (WCDMA) for a communication system and more particularly to detection of primary or secondary synchronization codes for WCDMA cell acquisition.
Present code division multiple access (CDMA) systems are characterized by simultaneous transmission of different data signals over a common channel by assigning each signal a unique code. This unique code is matched with a code of a selected receiver to determine the proper recipient of a data signal. These different data signals arrive at the receiver via multiple paths due to ground clutter and unpredictable signal reflection. Additive effects of these multiple data signals at the receiver may result in significant fading or variation in received signal strength. In general, this fading due to multiple data paths may be diminished by spreading the transmitted energy over a wide bandwidth. This wide bandwidth results in greatly reduced fading compared to narrow band transmission modes such as frequency division multiple access (FDMA) or time division multiple access (TDMA).
New standards are continually emerging for next generation wideband code division multiple access (WCDMA) communication systems as described in U.S. patent application Ser. No. 90/217,759, entitled Simplified Cell Search Scheme for First and Second Stage, filed Dec. 21, 1998, and incorporated herein by reference. These WCDMA systems are coherent communications systems with pilot symbol assisted channel estimation schemes. These pilot symbols are transmitted as quadrature phase shift keyed (QPSK) known data in predetermined time frames to any receivers within the cell or within range. The frames may propagate in a discontinuous transmission (DTX) mode within the cell. For voice traffic, transmission of user data occurs when the user speaks, but no data symbol transmission occurs when the user is silent. Similarly for packet data, the user data may be transmitted only when packets are ready to be sent. The frames include pilot symbols as well as other control symbols such as transmit power control (TPC) symbols and rate information (RI) symbols. These control symbols include multiple bits otherwise known as chips to distinguish them from data bits. The chip transmission time (TC), therefore, is equal to the symbol time rate (T) divided by the number of chips in the symbol (N). This number of chips in the symbol is the spreading factor.
Previous WCDMA base stations have broadcast primary (PSC) and secondary (SSC) synchronization codes to properly establish communications with a mobile receiver. The PSC identifies the source as a base station within the cell. The SSC further identifies a group of synchronization codes that are selectively assigned to base stations that may transmit within the cell. Referring now to FIG. 1, there is a simplified block diagram of a circuit of the prior art for generating primary and secondary search codes. These search codes modulate or spread the transmitted signal so that a mobile receiver may identify it. Circuits 102 and 110 each produce a 256 cycle Hadamard sequence at leads 103 and 111, respectively. Either a true or a complement of a 16-cycle pseudorandom noise (PN) sequence, however, selectively modulates both sequences. This 16-cycle PN sequence is preferably a binary Lindner sequence given by Z={1,1,xe2x88x921,xe2x88x921,xe2x88x921,xe2x88x921,xe2x88x921,1,1,xe2x88x921,1,1,1,xe2x88x921,1}. Each element of the Lindner sequence is further designated z1-z16, respectively. Circuit 108 generates a 256-cycle code at lead 109 as a product of the Lindner sequence and each element of the sequence. The resulting PN sequence at lead 109, therefore, has the form {Z,Z,xe2x88x92Z, xe2x88x92Z,xe2x88x92Z,xe2x88x92Z,Z,xe2x88x92Z,Z,Z,xe2x88x92Z,Z,Z,Z,xe2x88x92Z,Z}. Exclusive-OR circuit 112 modulates the Hadamard sequence on lead 111 with the PN sequence on lead 109, thereby producing a PSC on lead 114. Likewise, exclusive-OR circuit 104 modulates the Hadamard sequence on lead 103 with the PN sequence on lead 109, thereby producing an SSC on lead 106.
A WCDMA mobile communication system must initially acquire a signal from a remote base station to establish communications within a cell. This initial acquisition, however, is complicated by the presence of multiple unrelated signals from the base station that are intended for other mobile systems within the cell as well as signals from other base stations. The base station continually transmits a special signal at 16 KSPS on a perch channel, much like a beacon, to facilitate this initial acquisition. The perch channel format includes a frame with sixteen time slots, each having a duration of 0.625 milliseconds. Each time slot includes four common pilot symbols, four transport channel data symbols and two search code symbols. These search code symbols include the PSC and SSC symbols transmitted in parallel. These search code symbols are not modulated by the long code, so a mobile receiver need not decode these signals with a Viterbi decoder to properly identify the base station. Proper identification of the PSC and SSC by the mobile receiver, therefore, limits the final search to one of sixteen groups of thirty-two comma free codes each that specifically identify a base station within the cell to a mobile unit.
Referring to FIG. 2, there is a circuit of the prior art for detecting the PSC and SSC generated by the circuit of FIG. 1. The circuit receives the PSC symbol from the transmitter as an input signal IN on lead 200. The signal is periodically sampled in response to a clock signal by serial register 221 at an oversampling rate n. Serial register 221, therefore, has 15*n stages for storing each successive sample of the input signal IN. Serial register 221 has 16 (N) taps 242-246 that produce 16 respective parallel tap signals. A logic circuit including 16 XOR circuits (230, 232, 234) receives the respective tap signals as well as sixteen respective PN signals to produce sixteen output signals (231, 233, 235). This PN sequence matches the transmitted sequence from circuit 108 and is preferably a Lindner sequence. Adder circuit 248 receives the sixteen output signals and adds them to produce a sequence of output signals at terminal 250 corresponding to the oversampling rate n. An oversampling rate of n=1, for example, corresponds to one sample per chip, 256 samples per symbol, 2560 samples per time slot, and 40,960 samples per frame.
A 16-symbol accumulator circuit 290 receives the sequence of output signals on lead 250. The accumulator circuit 290 periodically samples the sequence on lead 250 in serial register 291 in response to the clock signal at the oversampling rate n. Serial register 291, therefore, has 240*n stages for storing each successive sample. Serial register 291 has sixteen taps 250-284 that produce sixteen respective parallel tap signals. Inverters 285 invert tap signals corresponding to negative elements of the Lindner sequence. Adder circuit 286 receives the sixteen output signals and adds them to produce a match signal MAT at output terminal 288 in response to an appropriate PSC symbol. This match result is subsequently stored in a buffer memory. In this manner, the match filter circuit samples the entire PN sequence at lead 200 for one frame of 10 milliseconds. Thus, the match filter detects a PSC symbol common to each time slot and an SSC symbol corresponding to each respective time slot. After the 10-millisecond sample period of first-stage cell acquisition, the match filter is reset and repeats the match process for a next frame. The previously acquired time of the PSC symbol match as well as the sixteen SSC symbols are passed to a second-stage of cell acquisition.
Referring to FIG. 3, there is a diagram showing cell acquisition of the prior art. The first-stage cell acquisition begins at time 301 when the first-stage 300, including match filter 220, 290 and buffer memory (not shown) are reset. The first-stage circuit 300 sequentially samples a PN sequence at lead 200 for 10 milliseconds. The results of the PSC symbol match from the first-stage circuit are passed 306 to a second-stage circuit 312 and the first-stage circuit is reset 303. The first-stage circuit 302 repeats the match sequence for the next 10-millisecond period. The second-stage circuit receives the sample time of the PSC symbol and determines the time of each SSC symbol in each time slot by a cumulative 0.625 millisecond offset of each sequential SSC symbol. The second-stage circuit decodes this sequence of SSC symbols to identify the position within the frame of the first PSC symbol match as well as which one of sixteen code groups are received from the base station. The code group identity is then passed 318 to a third-stage circuit 324. The third-stage circuit identifies one of thirty-two long code sequences in the code group that will be used to demodulate received data symbols.
These circuits of the prior art require significant memory and processing power to generate and identify the PSC and SSC. For example, each delay circuit 222, 224, 252 and 254 requires a memory cell for each PN sample. The subsequent buffer memory requires a similar memory size to store samples for second-stage cell acquisition. Moreover, a higher sample rate n requires a correspondingly greater memory size. An alternative scheme of Code Position Modulation (CPM) has been proposed which does not require a PSC match. This CPM scheme places SSC symbols at various symbol times within a PN sequence frame. The match filter must then correctly match the SSC symbol in each time slot of the frame and use the position of the SSC symbols within their respective time slots to determine the correct code group for second-stage cell acquisition. This method advantageously eliminates the step of PSC matching. The requirement to independently match and identify the position of each SSC symbol of the frame, however, results in increased circuit complexity without tangible gain.
Other studies such as by Ericsson, Comparisons of Cell Search Schemes: 3GPP Versus CPM, Feb. 26, 1999, have suggested that CPM acquisition is inferior to the existing 3GPP acquisition procedure as described with respect to FIG. 2. Furthermore, their study suggests that first-stage acquisition may be improved by continually accumulating the match filter output of the PSC symbol without resetting the match filter or subsequent buffer memory. This technique, however, presents other problems in first-stage cell acquisition. During initial acquisition by a mobile receiver after power-up, the mobile uses an internal clock to time PN sequence samples. This internal clock frequency is typically much less stable than the base station clock frequency. Moreover, it is not synchronized with the base station clock frequency and may experience a relative clock frequency drift of several KHz. This clock frequency drift during initial acquisition, therefore, increasingly disperses the initial PSC symbol match with each accumulated frame sample. This dispersion with increasing frame samples reduces the probability P1 of a correct first-stage PSC symbol match.
These problems are resolved by a circuit for detecting a serial signal comprising a first circuit coupled to receive the serial signal during a predetermined plurality of time periods of substantially equal duration. The first circuit is coupled to receive a first code and compares a part of the serial signal corresponding to each time period of the plurality of time periods to the first code, thereby producing a match signal. The first circuit accumulates the match signal from each of the each time period of the plurality of time periods.
The present invention improves cell acquisition. Clock frequency drift is minimized during initial acquisition.